A methodology and framework to assist in the architecture design and functional verification of complex electronic systems

  1. Tomasena, Koldo
Dirixida por:
  1. Igone Velez Isasmendi Director
  2. Juan Sevillano Berasategui Director

Universidade de defensa: Universidad de Navarra

Fecha de defensa: 12 de xullo de 2013

Tribunal:
  1. Andrés García-Alonso Montoya Presidente/a
  2. Andoni Irizar Picón Secretario/a
  3. Jon Legarda Macon Vogal
  4. Miguel Soto Rodríguez Vogal
  5. Francisco Javier del Pino Suárez Vogal

Tipo: Tese

Teseo: 116321 DIALNET lock_openDadun editor

Resumo

An integrated, powerful and flexible development environment has been created in this research work in order to simulate and verify electronic systems starting from a very high abstraction level. The system architecture design, the algorithm tuning and the functional verification can be performed efficiently early in the development process by means the proposed contributions