A methodology and framework to assist in the architecture design and functional verification of complex electronic systems

  1. Tomasena, Koldo
Supervised by:
  1. Igone Velez Isasmendi Director
  2. Juan Sevillano Berasategui Director

Defence university: Universidad de Navarra

Fecha de defensa: 12 July 2013

Committee:
  1. Andrés García-Alonso Montoya Chair
  2. Andoni Irizar Picón Secretary
  3. Jon Legarda Macon Committee member
  4. Miguel Soto Rodríguez Committee member
  5. Francisco Javier del Pino Suárez Committee member

Type: Thesis

Teseo: 116321 DIALNET lock_openDadun editor

Abstract

An integrated, powerful and flexible development environment has been created in this research work in order to simulate and verify electronic systems starting from a very high abstraction level. The system architecture design, the algorithm tuning and the functional verification can be performed efficiently early in the development process by means the proposed contributions