A methodology and framework to assist in the architecture design and functional verification of complex electronic systems

  1. Tomasena, Koldo
Dirigée par:
  1. Igone Velez Isasmendi Directeur/trice
  2. Juan Sevillano Berasategui Directeur/trice

Université de défendre: Universidad de Navarra

Fecha de defensa: 12 juillet 2013

Jury:
  1. Andrés García-Alonso Montoya President
  2. Andoni Irizar Picón Secrétaire
  3. Jon Legarda Macon Rapporteur
  4. Miguel Soto Rodríguez Rapporteur
  5. Francisco Javier del Pino Suárez Rapporteur

Type: Thèses

Teseo: 116321 DIALNET lock_openDadun editor

Résumé

An integrated, powerful and flexible development environment has been created in this research work in order to simulate and verify electronic systems starting from a very high abstraction level. The system architecture design, the algorithm tuning and the functional verification can be performed efficiently early in the development process by means the proposed contributions