Publikationen, an denen er mitarbeitet Jaime Jiménez Verde (20)

2011

  1. Wireless communication system for microgrids management in islanding

    Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011

2010

  1. Reconfigurable multiprocessor systems: A review

    International Journal of Reconfigurable Computing, Vol. 2010

  2. Review of Electronic Design Automation tools for High-Level Synthesis

    2010 International Conference on Applied Electronics, AE 2010

  3. The train communication network: Standardization goes aboard

    Proceedings of the IEEE International Conference on Industrial Technology

2009

  1. Overview of FPGA-based multiprocessor systems

    ReConFig'09 - 2009 International Conference on ReConFigurable Computing and FPGAs

2008

  1. A novel SoC architecture for a MVB slave node

    IECON Proceedings (Industrial Electronics Conference)

  2. Review of concepts involved in mixed PCBs design for electronic devices

    Proceedings - International Conference on Advances in Electronics and Micro-electronics, ENICS 2008

2007

  1. Design of a master device for the multifunction vehicle bus

    IEEE Transactions on Vehicular Technology, Vol. 56, Núm. 6 II, pp. 3695-3708

  2. Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs

    Journal of Systems Architecture, Vol. 53, Núm. 9, pp. 629-643

2006

  1. An emulator to develop the Wire Train Bus protocol stack

    IECON Proceedings (Industrial Electronics Conference)

  2. Comparison of two designs for the multifunction vehicle bus

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

  3. Modifying slots in test vectors to validate decoders of a train network

    Second International Conference on Wireless and Mobile Communications, ICWMC 2006

  4. Real-time stereo vision processing system in a FPGA

    IECON Proceedings (Industrial Electronics Conference)

2005

  1. Core-based architecture for data transfer control in SoC design

    New Algorithms, Architectures and Applications for Reconfigurable Computing (Springer US), pp. 43-54

  2. VHDL description of a synthetizable and reconfigurable real-time stereo vision processor

    WSEAS Transactions on Electronics, Vol. 2, Núm. 1, pp. 17-22

2004

  1. An implementation of a general regression neural network on FPGA with direct Matlab link

    Proceedings of the IEEE International Conference on Industrial Technology

  2. Manchester decoding algorithm for Multifunction Vehicle Bus

    Proceedings of the IEEE International Conference on Industrial Technology

2002

  1. Simulation environment to verify industrial communication circuits

    IECON Proceedings (Industrial Electronics Conference)

  2. Test workbench for electronic telecommunication systems

    IECON Proceedings (Industrial Electronics Conference)

2000

  1. Slave node architecture for train communications networks

    IECON Proceedings (Industrial Electronics Conference)