University of Rome Tor Vergata-ko ikertzaileekin lankidetzan egindako argitalpenak (2)

2018

  1. Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development

    Microprocessors and Microsystems, Vol. 61, pp. 58-71

2017

  1. The Next Generation of Exascale-Class Systems: The ExaNeSt Project

    Proceedings - 20th Euromicro Conference on Digital System Design, DSD 2017