Conjugando herramientas de simulación con aplicaciones y tecnologías emergentes en arquitectura de computadores

Laburpena

Computer engineering area is currently immersed in a period of profound changes, concerning both the underlying hardware and applications. Big Data has favored the development of a significant amount of specific software for the storage and analysis of large data volumes in recent years. However, hardware specialization shows slower evolution, so a part of this software is still executed on general purpose hardware. Under these circumstances, it seems necessary to precisely characterize the existing hardware behavior when executing this kind of software, in order to detect and deal with the potential inefficiencies. As for the hardware solutions to be proposed, the current scalability limits faced by CMOS fabrication technologies suggest the exploration of alternative ways to continue designing and implementing processors to reach higher levels of performance. Novel process fabrication techniques, such as 3D-stacking or non-volatile memory technologies, have been of great interest for academia and industry during the last years. Computer architecture, as the nexus between applications and underlying hardware, will be in charge of efficiently combining these applications and technologies. As the basic tool in this area, the simulation framework must take part in that evolution. This kind of tools should be able to precisely simulate emerging technologies and also to work with novel applications. In this thesis, we have worked in parallel to make progress in the three aspects previously mentioned. Making use of a simulation framework able to run full system simulations, we have adapted both the simulation tool and the evaluation methodology in order to work with applications that are representative of cloud computing environments, making architectural proposals based on non-volatile memory technologies. This work starts by evaluating the accuracy required to simulate applications with client-server software architecture, analyzing the induced error if the methodology is simplified to single-node simulations. According to the results obtained, it has been necessary to actively work on the simulation tool, adapting the research methodology to the requirements of emerging applications. With that methodology successfully adapted, we have carried out an exhaustive behavior characterization of the on-chip memory hierarchy when executing several modern NoSQL databases, comparing the results with conventional applications widely used in the area. Finally, using both the adapted methodology and emerging applications, we have worked with novel memory technology to make an architectural proposal to mitigate one of the main drawbacks of this technology, the variable nature of access latency. In particular, we propose the use of a mechanism inspired by hardware prefetching techniques, able to identify patterns in memory references to minimize this variability.