Publicacions en col·laboració amb investigadors/es de Universidad del País Vasco/Euskal Herriko Unibertsitatea (20)

2024

  1. Interrupt Latency Accurate Measurement in Multiprocessing Embedded Systems by Means of a Dedicated Circuit

    Electronics (Switzerland), Vol. 13, Núm. 9

2021

  1. Fast and efficient address search in System-on-a-Programmable-Chip using binary trees

    Computers and Electrical Engineering, Vol. 96

2016

  1. Dificultades al aprender a especificar máquinas de estados en sistemas microprogramados

    Tecnología, Aprendizaje y Enseñanza de la Electrónica: TAEE 2016: Libro de Actas del XII Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica

  2. Effect of different design stages on the SEU failure rate of FPGA systems

    2016 Conference on Design of Circuits and Integrated Systems, DCIS 2016 - Proceedings

  3. SafeSoC: A fault-tolerant-by-redundancy evaluation card for high speed serial communications

    2016 Conference on Design of Circuits and Integrated Systems, DCIS 2016 - Proceedings

2015

  1. Dependability in FPGAs, a Review

    2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015

2010

  1. Neuro semantic thresholding using OCR software for high precision OCR applications

    Image and Vision Computing, Vol. 28, Núm. 4, pp. 571-578

2009

  1. Scalable 128-bit AES-CM crypto-core reconfigurable implementation for secure communications

    2009 Applied Electronics International Conference, AE 2009

2007

  1. A TCN gateway emulator

    IEEE International Symposium on Industrial Electronics

2006

  1. An emulator to develop the Wire Train Bus protocol stack

    IECON Proceedings (Industrial Electronics Conference)

  2. Real-time stereo vision processing system in a FPGA

    IECON Proceedings (Industrial Electronics Conference)

  3. SOM Segmentation of gray scale images for optical recognition

    Pattern Recognition Letters, Vol. 27, Núm. 16, pp. 1991-1997

  4. Simulation of message data in a testbench for the multifunction vehicle bus

    IECON Proceedings (Industrial Electronics Conference)

2005

  1. Hardware implementation of optical flow constraint equation using FPGAs

    Computer Vision and Image Understanding, Vol. 98, Núm. 3, pp. 462-490

  2. Implementation of a modified Fuzzy C-Means clustering algorithm for real-time applications

    Microprocessors and Microsystems, Vol. 29, Núm. 8-9, pp. 375-380

  3. VHDL description of a synthetizable and reconfigurable real-time stereo vision processor

    WSEAS Transactions on Electronics, Vol. 2, Núm. 1, pp. 17-22

2004

  1. High throughput serpent encryption implementation

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2003

  1. A top-down design for the train communication network

    Proceedings of the IEEE International Conference on Industrial Technology

  2. Modified fuzzy C-means clustering algorithm for real-time applications

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2778, pp. 1087-1090

2000

  1. DSP-based board for control of jaw crushers used in mining and quarrying industry

    IECON Proceedings (Industrial Electronics Conference)