Gate-tunable graphene-organic interface barrier for vertical transistor and logic inverter

  1. Parui, S.
  2. Ribeiro, M.
  3. Atxabal, A.
  4. Bairagi, K.
  5. Zuccatti, E.
  6. Safeer, C.K.
  7. Llopis, R.
  8. Casanova, F.
  9. Hueso, L.E.
Revue:
Applied Physics Letters

ISSN: 0003-6951

Année de publication: 2018

Volumen: 113

Número: 15

Type: Article

DOI: 10.1063/1.5045497 GOOGLE SCHOLAR