Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip

  1. Zhang, G.
  2. Song, W.
  3. Garside, J.
  4. Navaridas, J.
  5. Wang, Z.
Revista:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Any de publicació: 2017

Volum: 25

Número: 11

Pàgines: 3152-3165

Tipus: Article

DOI: 10.1109/TVLSI.2017.2729081 GOOGLE SCHOLAR lock_openAccés obert editor